INFORMATION ABOUT CENTRAL PROCESSING UNIT (CPU)

 

What is CPU?

CPU (Central Processing Unit) is a very large-scale integrated circuit, usually called the brain of a computer. It is the computing core(Core) and controls unit of a computer. It is also the most important component of the entire computer system.

The central processing unit mainly includes an arithmetic unit(ALU, Arithmetic Logic Unit), a Cache, and a Bus for transmitting data, control, and status signals.

CPU, Memory, and I/O devices are called the three core components of an electronic computer.

CPU function

• Translating instruction 

• Processing data of software 

CPU component 

• Control Unit

• Arithmetic Unit

• Cache

CISC(complex instruction set computer). The early CPUs were all CISC architecture and were designed to perform the required computational tasks with minimal machine language instructions. This architecture increases the complexity of the CPU structure and the CPU process requirements, but is very beneficial for compiler development.

RISC(Reduced Instruction Set Computer). The RISC architecture requires software to specify individual operational steps. This architecture can reduce the complexity of the CPU and allow a more powerful CPU to be produced at the same level of technology, but with higher requirements for compiler design.

SMP(Symmetric Multi-Processor) refers to multiple CPUs working symmetrically in a server without primary or affiliation. Each CPU shares the same physical memory, and each each CPU accesses the same address in memory for the same amount of time, so SNMP is also known as uniform memory access(UMA).

NUMA(Non-Uniform Memory Access) is a non-uniform storage access structure. The basic feature of a NUMA server is that it has multiple CPUs. The CPU has independent loacl memory, I/O slots, and so on. Each CPU can access the entire system's memory, but accessing local memory will be much faster than accessing remote memory (memory of other CPUs in the system), which is why non-uniform storage accesses NUMA.

The Intel Xeon processor supports the NUMA architecture. Huawei servers enable NUMA function by default.

Cache

The Cache Memory is a temporary memory located between the CPU and the memory. CPU has L1, L2, L3 caches.

Cache balance shifted from shared-distributed(prior architectures) to private-local (Skylake server architecture ):

• Shared-distributed (Haswell): Shared-distributed L3 is the primary cache.

• Private-local(Skylake): private L2 becomes the primary cache with shared L3 used as overflow cache.

Shared L3 changed from inclusive to non-inclusive:

• Inclusive (Haswell): L3 has copies of all lines in L2.

• Non-inclusive(Skylake): lines in L2 may not exist in L3.

Memory reads fill directly to the MLC, no longer to both the MLC and LLC;

When an MLC line needs to be removed, both modified and unmodified lines are written back;

Data shared across cores are copied into the LLC for servicing future MLC misses.

Memory Identifier

You can determine the memory module properties based on the label attached to the memory module.

Memory Installation Positions

This
post uses the 1288H V5 as an example:

• Memory slots

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